Mixed Signal Test

Technical Activity Committee on MIXED-SIGNAL TEST

TAC Chair:  Bozena KAMINSKA, bozena@pultronics.com

During the last few years, interest in analog and mixed-signal testing has grown considerably. There are the following main reasons for this: the first is the complex nature of the issues surrounding system and circuit testing, and is similar to the reason for increased interest in digital circuits which began in the late 1970s; the second stems from the rapid increase in high-performance applications in such areas as communications, computer and video technologies, automotive electronics, and others. Generally, a design uses analog components to interface digital processing and to accelerate processing in high-performance systems. The success of these applications, as determined by their quality and reliability, requires the integration of comprehensive test methodologies and tools into design and test environments. Finally, a very aggressive drive to deep submicron technologies and designs is observed. This implies analog effects on digital signals and, consequently, changing even digital testing into analog oriented test.

We can observe more and more of signal integrity tests, current, power, noise, and other analog tests applied to each high performance design.

As the challenges and opportunities will continually develop in the field of mixed-signal testing for future systems, in 1993 the TAC has initiated the Mixed-Signal Testing Group. Up to now, the following activities are on the list of the successful achievements of the Mixed-Signal Testing Group:

    1. The Workshops devoted to the topic are organized interchangeably in Europe, Canada, and in US. Included is the list of those which already took place.
      • Grenoble, France, 1995
      • Quebec City, Canada, 1996
      • Seattle, WA, US, 1997
      • the Hague, Netherlands, 1998
      • Vancouver, Canada, 1999
      • Montpellier, France, 2000
      • Atlanta, Georgia, USA, 2001
      • Montreaux, Switzerland, 2002
    2. JETTA, special issue on Mixed-Signal Testing, Summer 1996.
    3. IEEE Design & Test Journal, special section on Mixed Signal Design and Test, Autumn 1996.
    4. First initiative for mixed-signal benchmark circuit development. Working Group has been formed, the framework has been established, and results has been achieved. IEEE ITC publication, 1997, and web page access to the first set of the circuits.
    5. The common definition of the analog fault model is the next target. First understanding of the analog fault modeling is summarized in the ITC’s TAC paper from 1997.
    6. Farther benchmark circuit development is in progress. More volunteers are welcome.

Conferences and symposia

19th IEEE Workshop on Silicon Errors in Logic – System Effects (SELSE) 2023

Paper registration: December 23, 2022
Paper submission: January 9, 2023

IEEE European Test Symposium 2023
Title+Abstract: December 9, 2022
Paper: December 16, 2022

IEEE VLSI Test Symposium 2023
Title+Abstract: November 5, 2022
Paper: November 11, 2022

DATE 2023
Title+abstract: September 18, 2022 (AoE)
Paper: September 25, 2022 (AoE)

IEEE Asian Test Symposium 2022
Abstract & Full Paper Submission Deadline: July 1st, 2022 (AoE)

ITC India 2022
Abstract & Full Paper Submission Deadline: May 9th, 2022

IOLTS 2022
Paper submission: May 10, 2022

LATS 2022
Title+abstract: May 6, 2022
Paper: May 13, 2022