2014 Doctoral Thesis Award Winner: Samah Saeed

2014 Finals held at International Test Conference (ITC)

Session Chair and Global Coordinator: Michele Portolan (Université Grenoble Alpes, France)

  1. Julio César Vázquez Hernández, “Aging Robust Monitoring and Techniques to Improve Performance on Digital Systems”, National Institute for Astrophysics Optics and Electronics (INAOE), Mexico, winner of the LATW semi-final. Advisors:
    • Víctor Champac, INAOE, Puebla-Mexico.
    • Marcelino Bicho dos Santos, INESC-ID and IST, UTL, Lisboa-Portugal.
  2. Samah Saeed, “DfT Approaches and Security Challenges in the Scan Design”, NYU Polytechnic School of Engineering. Advisor:
    • Ozgur Sinanoglu, New York University Abu Dhabi
  3. Luca Cassano, “Analysis and Test of the Effects of Single Event Upsets Affecting the Configuration Memory of SRAM-based FPGAs”, University of Pisa, Italy. Advisors:
    • Cinzia Bernardeschi, Department of Information Engineering, University of Pisa, Italy
    • Andrea Domenici, Department of Information Engineering, University of Pisa, Italy

Jury members for the Final:

Lorena Anghel, Université Grenoble-Alpes, France

Tim Cheng, Standford University, USA

Erik Larsson, Lund University, Sweden

Vivek Chickermane, Cadence

Teresa McLaurin, ARM

Jeff Rearick, AMD

 

 

Semi-final jury members:

Local Coordinator for VTS: Michail Maniatakos (NYUAD, UAE)
Local Coordinator for ETS: Jaan Raik (Tallin University, Estonia)
Local Coordinator for LATW:

  • José Lipovetzky (UBA, Argentina)
  • Eduardo Bezerra (UFSC, Brazil)
  • Paolo Rech (UFRGS, Brazi)

Prof. Matteo Sonza Reorda (Politecnico di Torino)

Prof. Krishnendu Chakrabarty (Duke University)

Dr. Erik Larsson (Lund University)

Dr. Xinli Gu (Huawei)

Dr. Mohamed Azimane (NXP)

Marcelo Luzaszesky (CEITEC, Porto Alegre, Brazil)

Pablo Alejandro Ferreyra (Servicios Tecnológicos Integrados S.R.L. / UNC, Cordoba, Argentina)

Francisco J. Russi (Synopsys, Inc. Austin, USA)

Lirida Alves de Barros Naviner (Télécom ParisTech Paris, France)

Celia López Ongil (Carlos III University of Madrid, Madrid, Spain)

Sonia Ben Dhia (INSA Toulouse / LAAS CNRS, Toulouse, France)

José Lipovetzky (CONICET – UBA, Buenos Aires, Argentina)

Helano Castro (Universidad Federal do Ceará, Brazil)

Rajat Chakraborty (IIT Kharagpur)

Shawn Blanton (CMU)

Ioannis Voyiatzis (Techological Institute of Athens)

Haralampos Stratigopoulos (TIMA)

Adit Singh (Auburn University)

Peilin Song (IBM)

Gagi Dragoljub (Intel)

Arpan Nhattacherjee (Synopsys)

Paul Berndt (Cypress)

Nilanjam Mukherjee (Mentor)

Conferences and symposia

19th IEEE Workshop on Silicon Errors in Logic – System Effects (SELSE) 2023

Paper registration: December 23, 2022
Paper submission: January 9, 2023

IEEE European Test Symposium 2023
Title+Abstract: December 9, 2022
Paper: December 16, 2022

IEEE VLSI Test Symposium 2023
Title+Abstract: November 5, 2022
Paper: November 11, 2022

DATE 2023
Title+abstract: September 18, 2022 (AoE)
Paper: September 25, 2022 (AoE)

IEEE Asian Test Symposium 2022
Abstract & Full Paper Submission Deadline: July 1st, 2022 (AoE)

ITC India 2022
Abstract & Full Paper Submission Deadline: May 9th, 2022

IOLTS 2022
Paper submission: May 10, 2022

LATS 2022
Title+abstract: May 6, 2022
Paper: May 13, 2022