Mixed Signal Test

Technical Activity Committee on MIXED-SIGNAL TEST

TAC Chair:  Bozena KAMINSKA, bozena@pultronics.com

During the last few years, interest in analog and mixed-signal testing has grown considerably. There are the following main reasons for this: the first is the complex nature of the issues surrounding system and circuit testing, and is similar to the reason for increased interest in digital circuits which began in the late 1970s; the second stems from the rapid increase in high-performance applications in such areas as communications, computer and video technologies, automotive electronics, and others. Generally, a design uses analog components to interface digital processing and to accelerate processing in high-performance systems. The success of these applications, as determined by their quality and reliability, requires the integration of comprehensive test methodologies and tools into design and test environments. Finally, a very aggressive drive to deep submicron technologies and designs is observed. This implies analog effects on digital signals and, consequently, changing even digital testing into analog oriented test.

We can observe more and more of signal integrity tests, current, power, noise, and other analog tests applied to each high performance design.

As the challenges and opportunities will continually develop in the field of mixed-signal testing for future systems, in 1993 the TAC has initiated the Mixed-Signal Testing Group. Up to now, the following activities are on the list of the successful achievements of the Mixed-Signal Testing Group:

    1. The Workshops devoted to the topic are organized interchangeably in Europe, Canada, and in US. Included is the list of those which already took place.
      • Grenoble, France, 1995
      • Quebec City, Canada, 1996
      • Seattle, WA, US, 1997
      • the Hague, Netherlands, 1998
      • Vancouver, Canada, 1999
      • Montpellier, France, 2000
      • Atlanta, Georgia, USA, 2001
      • Montreaux, Switzerland, 2002
    2. JETTA, special issue on Mixed-Signal Testing, Summer 1996.
    3. IEEE Design & Test Journal, special section on Mixed Signal Design and Test, Autumn 1996.
    4. First initiative for mixed-signal benchmark circuit development. Working Group has been formed, the framework has been established, and results has been achieved. IEEE ITC publication, 1997, and web page access to the first set of the circuits.
    5. The common definition of the analog fault model is the next target. First understanding of the analog fault modeling is summarized in the ITC’s TAC paper from 1997.
    6. Farther benchmark circuit development is in progress. More volunteers are welcome.

Upcoming conferences and symposia

IEEE VLSI Test Symposium (VTS) 2026
Submission deadline: December 5, 2025
Notification: January 24, 2026
Camera-ready upload: February 28, 2026
Conference: April 27-29, 2026

IEEE European Test Symposium (ETS) 2026
Submission of title, abstract, authors: 15 December 2025
Full paper submission: 12 January 2026
Notification of acceptance: 20 February 2026
Camera-ready manuscript: Deadline: 22 March 2026
Conference: May 25-29, 2026

IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS) 2026

Submission of title, abstract, and authors: March 1, 2026
Final Paper Submission: March 8, 2026
Author Notification: April 12, 2026
Conference Dates: July 1 – 3, 2026

International Test Conference (ITC) 2026
Paper title/abstract due: March 20, 2026
Paper final PDF due: April 24, 2026
Author notification: June 19, 2026
Conference Dates: October 11 to 16, 2026

IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) 2026
Title and abstract submissions April 24th, 2026
Full paper submissions May 1st, 2026
Notification July 10th, 2026
Camera ready and author’s registration July 24th, 2026