Silent Data Corruption

Technical Activity Committee on Silent Data Corruption

TAC Chair: Yervant Zorian, Synopsys, Yervant.Zorian@synopsys.com
TAC Vice-Chairs:Harish Dixit, Meta; Dimitris Gizopoulos, University of Athens;

Recent publications from hyperscalers, such as Meta, Google, etc. have highlighted the “Silent Data Corruption” as an eminent challenge that surfaces in modern data centers as functional errors after years of operation. What might we do in design to combat the complexities and costs of this problem. How do we analyze the root cause? Do we build our new designs to be reactive to SDC after they happen, detecting and potentially correcting faults? or is it better to prognose degrading faults in advance to perform predictive maintenance and intercept before SDC happens? What particular metrics need to be used to meet SDC requirements, in terms of quality and RAS?
This TAC will highlight the different efforts underway, raise public, and allow to gain insights from experts covering different perspectives from hyperscalers, semiconductor suppliers, IP vendors, and research community. The above can be achieved through special session presentations at TTTC conferences, Special issues of relevant publications, and standardization of metrics as necessary.

Upcoming conferences and symposia

IEEE VLSI Test Symposium (VTS) 2026
Submission deadline: December 5, 2025
Notification: January 24, 2026
Camera-ready upload: February 28, 2026
Conference: April 27-29, 2026

IEEE European Test Symposium (ETS) 2026
Submission of title, abstract, authors: 15 December 2025
Full paper submission: 12 January 2026
Notification of acceptance: 20 February 2026
Camera-ready manuscript: Deadline: 22 March 2026
Conference: May 25-29, 2026

IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS) 2026

Submission of title, abstract, and authors: March 1, 2026
Final Paper Submission: March 8, 2026
Author Notification: April 12, 2026
Conference Dates: July 1 – 3, 2026

International Test Conference (ITC) 2026
Paper title/abstract due: March 20, 2026
Paper final PDF due: April 24, 2026
Author notification: June 19, 2026
Conference Dates: October 11 to 16, 2026

IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) 2026
Title and abstract submissions April 24th, 2026
Full paper submissions May 1st, 2026
Notification July 10th, 2026
Camera ready and author’s registration July 24th, 2026