VTS 2013 - Call for Papers

CALL FOR PAPERS

Scope -- Submissions -- Key Dates -- Additional Information -- Committees

Scope

The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in testing, debug and repair of microelectronic circuits and systems. Major topics include, but are not limited to:

Analog, Mixed-Signal & RF Test
ATPG & Compression
ATE Architecture & Software
Built-In Self-Test (BIST)
Defect & Current Based Test
Defect/Fault Tolerance
Delay & Performance Test
Design for Testability (DFT)
Design Verification/Validation
Diagnosis and Debug
Embedded System & Board Test
Embedded Test Methods
Emerging Technologies Test
FPGA Test
Fault Modeling and Simulation

Hardware Security
Low-Power IC Test
Microsystems, MEMS and Sensor Test
Memory Test and Repair
On-Line Test & Error Correction
Power & Thermal Issues in Test
System-on-Chip (SOC) Test
Test Standards
Test Economics
Test of Biomedical Devices
Test of High-Speed I/O
Test Quality and Reliability
Test Resource Partitioning
Transients and Soft Errors
2.5D, 3D and SiP Test

Submissions

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The VTS Program Committee invites original, unpublished paper submissions for VTS 2014. Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required.

Proposals for the Innovative Practices and Special Sessions tracks are also invited. The innovative practices track highlights cutting-edge challenges faced by test practitioners, and innovative solutions employed to address them. Special sessions can include panels, embedded tutorials, or hot topic presentations. Innovative practices and special session track proposals should include a title, name and contact information of the session organizer(s), a 150-to-200 word abstract, and a list of prospective participants.

All submissions are to be made electronically through the VTS website. The deadline for all submissions is October 18th, 2013. Detailed instructions for submissions are to be found at the symposium website http://www.tttc-vts.org. Authors will be notified of the disposition of their papers by December 20th, 2013. A submission will be considered as commitment that, upon acceptance, the author(s) will submit a final camera-ready version of the paper for inclusion in the symposium proceedings and will present the paper at the symposium. The registration of at least one author is required for publication. The organizing committee of VTS reserves the right to exclude a paper from distribution after the symposium (e.g., removal from IEEE Xplore) if the paper is not presented at the symposium. In the case of innovative practices and special sessions, the organizers commit to submitting a session title, abstract, and a list of participants for inclusion in the symposium proceedings.

VTS 2014 will present a Best Paper Award, a Best Special Session Award, and a Best Innovative Practices Session Award based on the evaluations of reviewers, attendees, and an invited panel of judges. We also plan to organize a Student Poster Competition and a TTTC Best Doctoral Thesis Contest, details for which will be available through the VTS website at a later date. The best paper of VTS 2014 and the best Innovative Practices presentation will be invited to resubmit to the IEEE Design & Test of Computers and will undergo the regular, but expedited, review process of this periodical.

TTTC Test Technology Educational Program (TTEP) tutorials on emerging test technology topics will be offered in conjunction with VTS 2014. Tutorial proposals should be submitted according to TTEP 2014 submission deadlines, which will be posted on http://computer.org/tab/tttc/teg/ttep.

Key Dates

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Submission deadline: October 18th, 2013
Notification of acceptance: December 20th, 2013

Additional Information

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General Information

GENERAL CHAIR
Claude Thibeault
École de Technologie Supérieure
claude.thibeault@etsmtl.ca

Submission Information

PROGRAM CHAIR
Yiorgos Makris
The University of Texas at Dallas
yiorgos.makris@utdallas.edu

Committees

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General Chair
C. Thibeault– E. Tech. Sup. Montreal

Program Chair
Y. Makris – Univ. of Texas at Dallas

Past Chair
M. Renovell – LIRMM

Vice-General Chairs
P. Maxwell – Aptina
C.H. Chiang – Alcatel-Lucent

Vice-Program Co-Chairs
L. Anghel – TIMA
S. Ravi – Texas Instruments

New Topics
B. Courtois – CMP
B. Kaminska – Simon Fraser Univ.

Special Sessions
K. Hatayama – NAIST
R. Kapur – Synopsys

Innovative Practices Track
B. Cory – Nvidia
S. Mitra – Stanford Univ.

Registration
S. Ozev – Arizona State Univ.

Publications
G. Di Natale – LIRMM

Publicity & Web
S. Di Carlo – Polit. di Torino
Z. Navabi – Worcester Polytechnic

Finance
R. Makki – GlobalFoundries

Audio/Visual
J. Dworak – Southern Methodist Univ.

Local Arrangements
W. Eklow – Cisco

Ex-Officio
Y. Zorian – Synopsys

Program Committee (Invited)
J. Abraham – Univ. of Texas at Austin
V. Agrawal – Auburn Univ.
D. Appello – ST Microelectronics
B. Becker – Univ. of Freiburg
R. Blanton – CMU
J. Carulli – Texas Instruments
A. Chatterjee – Georgia Tech
C.J. Clark – Intellitech
C. Dixit – LSI
R. Galivanche – Intel
P. Girard – LIRMM
D. Gizopoulos – Univ. of Athens
S. Gupta – Univ. of Southern California
I. Hartanto – Xilinx
S. Hellebrand – Univ. of Paderborn
C.-T. Huang – NTHU
R. Karri – NYU-Poly
H. Konuk – Broadcom
E. Larsson – Lund University
X. Li – Chinese Academy of Science
A. Majumdar – AMD
S. Makar –
S. Natarajan – Intel
A. Orailoglu – UC San Diego
J. Rajski – Mentor Graphics
S. Reddy – Univ. of Iowa
S. Shaikh – Broadcom
S. Shoukourian – Synopsys
O. Sinanoglu – NYU Abu Dhabi
P. Song – IBM
M. Sonza-Reorda – Polit. di Torino
H. Stratigopoulos – TIMA
S. Sunter – Mentor Graphics
M. Tehranipoor – Univ. of Connecticut
J. Tyszer – Poznan Univ.
F. Vargas – PUCRS
L. Wang – UC Santa Barbara
C.-W. Wu – NTHU
H.-J. Wunderlich – Univ. of Stuttgart

Steering Committee:
M. Abadir – Freescale
J. Figueras – Univ. of Pol Catalunya
A. Ivanov – Univ. of British Columbia
M. Nicolaidis – TIMA
P. Prinetto – Polit. di Torino
A. Singh – Auburn Univ.
P. Varma – Ansys
Y. Zorian – Synopsys

For more information, visit us on the web at: http://www.tttc-vts.org

The IEEE VLSI Test Symposium (VTS 2013) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).