IDT 2011 - Call for Papers

SUBMISSION DEADLINE EXTENDED SEPTEMBER 20, 2011!

CALL FOR PAPERS

Scope -- Submissions -- Key Dates -- Additional Information -- Committees

Scope

The International Design and Test Conference provides a unique forum to discuss novel approaches in design, automation and test in the Middle East and Africa (MEA) region for researchers and practitioners in the areas of VLSI design, test and fault tolerance to come together to discuss new research ideas and present new research results. This event will provide the only VLSI Design & Test-specific meeting in the MEA region. Workshop topics include all aspects of design, test and automation. Specific topics are to include:

System Specification and Modelling
System Design Methods
SOC/NOC/MPSOC
Quantum MEMs
Architectures & Nanotechnology Architectures
Reconfigurable Computing
Emerging Technologies, Systems & Applications
Architectural and Logic synthesis
Design of Low Power Systems & Power Analysis
Packaging
Design Verification and Formal Methods
Mixed-Signal and RF Design
IC Physical Design Automation
Test Generation, Simulation and Diagnosis
Real Time Systems

Design for Test
Embedded Systems
Defect-Based Test
Fault Modeling
Test Issues in Nanotechnology
Built-In Self Test (BIST)
Design for Manufacturability (DFM)
Memory and FPGA Test and Repair
Automatic Test Equipment
Analog and Mixed-Signal Test
On-Line Testing
Test Resource Partitioning
Failure Analysis
Fault Tolerance
Economics of Test

Applications Design: Media, Signal Processing, Wireless Communication and Networking, Automotive, Military, Secure Embedded Implementations, etc.

Submissions

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Prospective authors are invited to submit a 4-6 page full paper describing original work. Papers should meet the standard IEEE 2-column format. All submissions should be made electronically at http://www.edamenda.org/. Accepted papers will be published in IEEEXplore subject to advance full-registration of at least one of the authors. The submission of a paper, a hot topic session, or a panel proposal will be considered as an evidence that upon acceptance, the author(s) will present the paper or organize the panel at the workshop. For general information, please contact zorian@synopsys.com or kurdahi@uci.edu.

Key Dates

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Paper Submission deadline: September 20, 2011 (extended)
Notification of acceptance: October 7, 2011
Camera-ready Manuscripts: October 17, 2011
Conference Pre-registration: October 17, 2011

Committees

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Organizing Committee

GENERAL CO-CHAIRS:
Fadi Kurdahi
University of California at Irvine, USA

Yervant Zorian
Synopsys, USA

TECHNICAL PROGRAM CO-CHAIRS:
Haidar Harmanani
Lebanese American University, Lebanon

Andre Ivanov
University of British Columbia, USA

Ashraf Salem
Mentor Graphics, Egypt

VICE GENERAL CO-CHAIRS:
Hazem ElTahawy
Mentor Graphics, Egypt

Rafic Makki
ADEC, UAE

Mohamad Sawan
Polytechnique Montréal, Canada

VICE PROGRAM CO-CHAIRS:
Said Hamdioui
Delft University, The Netherlands

Mohamed Abid
CES-ENIS, Tunisia

SPECIAL SESSION CO-CHAIRS:
Ana Rusu
Royal Institute of Technology, Sweden

Eric Kerhervé
University of Bordeaux, France

TUTORIALS CHAIR CO-CHAIRS:
Tor Sverre Lande (Bassen)
University of Oslo, Norway

Massimo Alioto
Univerità di Siena, Italy

FINANCE CO-CHAIRS:
Ayman Kayssi
American University of Beirut, Lebanon

Iyad Ouaiss
Lebanese American University, Lebanon

LOCAL ARRANGEMENTS CO-CHAIRS:
Samer Saab
Lebanese American University, Lebanon

Mohammad Mansour
American University of Beirut, Lebanon

INDUSTRY LIAISON CHAIR:
Magdy Abadir
Freescale, USA

PUBLICATIONS CO-CHAIRS:
Valeriu Beiu
United Arab Emirates University, UAE

W. Elkharashi
Ain Shams University, Egypt

PUBLICITY CO-CHAIRS:
Bernard Courtois
CMP, France

Abdulfattah Obeid
King Abdulaziz City ST, Saudi Arabia

PANELS CHAIR:
Ayman Kayssi
American University of Beirut, Lebanon

TTTC LIAISON:
C.-H., Chiang,
Alcatel-Lucent, USA

For more information, visit us on the web at: http://www.edamenda.org/

The 6th IEEE International Design and Test Workshop (IDT 2011 ) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Circuits & Systems Society, and is technically co-sponsored by the IEEE Computer Society's Test Technology Technical Council (TTTC).