VTS 2011 - Call for Participation

CALL FOR PARTICIPATION

Scope -- Key Dates -- Venue -- Workshop Registration -- Advance Program -- More Information -- Committees

Scope

The IEEE VLSI Test Symposium explores emerging trends and novel concepts in the testing of integrated circuits and systems. The symposium is a leading international forum where many of the world's leading test experts and professionals from both industry and academia join to present and debate key issues in testing.
VTS 2011 addresses key trends and challenges in the semiconductor design and manufacturing industries through an exciting program that includes Keynote and Plenary Talks, Technical Paper Sessions, Panels, New Topic Sessions, Full-day Tutorials, co-located Workshops, and the Innovative Practices Track.

TECHNICAL PAPER SESSIONS will present the latest research results in test, including:
- Post-Silicon Debug& Customer returns
- 3D ICS
- Power Issues in Test
- Analog, Mixed-Signal& RF Test /Diagnosis
- Delay& Performance Test
- Security
- Memory Test and Repair
- Low-Power IC Test
- Defects& Faults Modelling& Simulation
- Aging, Transients& Soft Errors
- Design for Testability
- Error& Fault Tolerance
- ATPG& Compression
- Reducing Test& Diagnosis Costs

EMBEDDED TUTORIAL
- Mixed-Signal Test

FEATURED PANELS
- Design Verification
- Apprentice - VTS Edition: Season 4

HOT TOPIC SESSIONS
- Field Reliability
- Solar Cells
- Emerging Memories
- Smart Silicon

OTHER SESSIONS
- IP Sessions
- Thesis Research Posters
- E.J. McCluskey Doctoral Thesis Competition

SOCIAL ACTIVITIES
- Whale watching excursion
- Gala dinner

Key Dates

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Advance (Discounted) Registration Deadline: April 11, 2011!
Hotel Reservation Deadline: April 11, 2011 at 5:00 pm Pacific time

The Venue

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Laguna Cliff Marriott Resort, California

Room Rates
Single/Double Room $149+tax

Reservation Procedure
Reservation can be made by internet (www.lagunacliffs.com) or by phone (1-800-Marriott or 1-949-487-4969). Meeting attendees will reference group code IEVIEVA when making reservations.

HOTEL Home Page:	www.lagunacliffs.com
ADDRESS:	25135 Park Lantern,Dana Point, CA, 92629, USA
PHONE:	+1-800-Marriott or +1-949-487-4969
RESERVATION CODE:	IEVIEVA

Workshop Registration

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Online registration is available here.

Advance Program

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For a Preliminary Program, Conference Registration and Hotel Information please visit:

http://www.tttc-vts.org

More Information

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General Chair
Cecilia Metra
University of Bologna
cmetra@deis.unibo.it

Program Chair
Claude Thibeault
École de technologie supérieure
claude.thibeault@etsmtl.ca

Committees

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General Chair
C. Metra - U. Bologna

Program Chair
C. Thibeault - ETS

Past General Chair
M. Abadir - Freescale

Vice-General Chairs
P. Maxwell - Aptina
M. Renovell - LIRMM/CNRS

Vice-Program Chairs
R. Galivanche - Intel Corp.
S. Ravi - Texas Instruments

Finance
C.H. Chiang - Alcatel-Lucent

Special Sessions
L. Anghel - TIMA
H. Hatayama - STARC

Innovative Practices Track
K. Arabi - Qualcomm
S. Mitra - Stanford U

New Topics
B. Courtois - TIMA
B. Kaminska - Simon Fraser U.

Audio/Visual
R. Kapur - Synopsys

Registration
Y. Makris - Yale University

Publications

Chair:	D. Gizopoulos - UNIPI
Members:	Ujjwal Guin - Temple University USA

Local Arrangements
Li Wang - Univ. of Calif. at Santa Barbara

Corporate Support
B. Cory - Nvidia

Publicity

Chair:	G. Di Natale - LIRMM
Members:	Stefano Di Carlo - Politecnico di Torino Martin Omana - U. Bologna Daniele Rossi - U. Bologna

International Liaisons

China & Taiwan:	C-W. Wu - ITRI
Eastern Europe:	V. Hahanov - KHNURE Ukraine
India:	C.P. Ravikumar - Texas Instr.
Japan:	Y. Sato - Kyushu Institute of Technology
Latin America:	V. Champac - INAOEP Mexico
Midlle East & Africa:	R. Makki - UAE U
Western Europe:	E. J. Marinissen - IMEC

Ex-Officio
Y. Zorian - Synopsys

Program Committee

J. Abraham - U of Texas Austin
V. Agrawal - Auburn U
D. Appello - ST Microelectronics
B. Becker - U Freiburg
J. Bhadra - Freescale
K. Chakrabarty - Duke University
A. Chatterjee - Georgia Tech
C.J. Clark - Intellitech
P. Girard - LIRMM
X. Gu - Cisco
S. Gupta - U of Southern California
I. Hartanto - Xilinx
S. Hellebrand - U Paderborn
C.-T. Huang - National Tsing Hua U
A. Khoche - Consultant
H. Konuk - Broadcom
X. Li - Chinese Acad. Sci.
F. Lombardi - Northeastern U
M. Lubaszewski - UFRGS
A. Majumdar -AMD
S. Mourad - Santa Clara U
Z. Navabi - Worcester Polytechnic
A. Orailoglu - UCSD
J. Rajski - Mentor Graphics
S. Reddy - U. Iowa
K. Roy - Purdue U
J. Segura - U Illes Balears
S. Shoukourian - Synopsys
M. Soma - U of Washington
P. Song - IBM
S. Sunter - Mentor Graphics
M. Tehranipoor - U. Connecticut
J. Tyszer - Poznan U
H.-J Wunderlich - U. Stuttgart

Steering Committee

J. Figueras - U Pol Catalunya
A. Ivanov - UBC
M. Nicolaidis - TIMA
P. Prinetto - Polit di Torino
A. Singh - Auburn U
P. Varma - Blue Pearl
Y. Zorian - Synopsys

For more information, visit us on the web at: http://www.tttc-vts.org

The 29th IEEE VLSI Test Symposium (VTS2011) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).

TTTC's Electronic Broadcasting Service
	29th IEEE VLSI TEST SYMPOSIUM (VTS 2011) May 2-4, 2011 Laguna Cliffs Resort & Spa Dana Point, California, USA http://www.tttc-vts.org