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IEEE International Symposium on Defect and Fault Tolerant Nanoscale Architectures
CALL FOR PAPERS
Current defect tolerance, fault-tolerance and manufacturing test techniques are designed under the assumption that a system under test is composed largely of correctly functioning units. However, this assumption is severely tested in emerging nanoelectronics such as molecular electronics, quantum electronics, single electron transistors and carbon nanotubes and nanowires. In these nanoelectronics, self-assembly based fabrication results in failures rates an order of magnitude higher than in traditional CMOS. Consequently, defect and fault tolerance -at the physical, circuit and most importantly at the system level- is an enabling technology for building reliable nanoelectronic systems.
NANOARCH will investigate novel defect and fault tolerance architectures targeting these highly unreliable nanoelectronics. The workshop will be a forum for presenting theoretical, simulation and case studies on new defect models, defect and fault tolerance architectures, associated experimental reliability evaluation and validation frameworks and computer aided simulation and design tools for these emerging nanoelectronics. Topics of interest include but are not limited to:
The Program Committee invites authors to submit papers up to 8 pages in length, describing original, unpublished recent work. Clearly describe the nature of the work, explain its significance, highlight novel features, and describe its current status. Electronic submission through the workshop website is required.
The final versions of accepted papers will be included in the NANOARCH Symposium Proceedings
NANOARCH 2007 will have an Official Symposium Proceedings Published by the IEEE.
For more information, visit us on the web at: http://www.nanoarch.org/
3rd IEEE International Workshop on Defect and Fault Tolerant Nanoscale
Architectures (NANOARCH’07) is sponsoredby the Institute of Electrical
and Electronics Engineers (IEEE) Computer Society's Test Technology Technical
IEEE Computer Society- Test Technology Technical Council
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