First IEEE International Workshop on Silicon Lifecycle Management
(SLMW 2021)
October 14-15, 2021
Virtual conference 

http://slm.tttc-events.org

With increasing system complexity, security, stringent runtime requirements for functional safety, and cost constraints of a mass market, the reliable and secure operation of electronics in safety-critical, enterprise servers, and cloud computing domains is still a major challenge. While traditionally design time and test time solutions were supposed to guarantee the in-field dependability and security of electronic systems, due to complex interaction of runtime effects from running workload and environment, there is a great need for a holistic approach for silicon lifecycle management, spanning from design time to in-field monitoring and adaptation. Therefore the solutions for lifecycle management should include various sensors and monitors embedded in different levels of the design stack, access mechanisms, and standards for such on-chip and in-system sensor networks, as well as data analytics on the edge and in the cloud. This inaugural edition of the SLM Workshop tries to build a community around this topic and offer a forum to present and discuss these challenges and emerging solutions among researchers and practitioners alike.

SLM will take place in conjunction with the IEEE International Test Conference (ITC 21); is sponsored by the IEEE Philadelphia Chapter, and conceived by the IEEE Test Technology Technical Council (TTTC).

Topic Areas – You are invited to participate and submit your contributions to the SLM Workshop. The workshop’s areas of interest include (but are not limited to) the following topics:

• Design and placement of various sensors and monitors for functional safety and security
• Standards for sensor data aggregation
• Data analytics for sensor data processing
• Anomaly detection for security and functional safety
• Machine learning for in-field system health monitoring
• Multi-layer dependability evaluation
• In-field verification and validation
• Fault tolerance and self-checking circuits
• Aging effects on electronics
• Reuse and extension of the test, debug and repair infrastructure for in-filed management
• Power-up, power-down and periodic tests
• System-level test
• Preventive Maintenance
• Concurrent and periodic checking
• Functional and structural test generation
• Graceful degradation
• Useful remaining lifetime prediction
• Failure prediction and forecasting
• Attack prediction and prevention
• In-field configuration and adaptation
• Cross-layer solutions

The Workshop asks for the submission of Extended Abstracts of a maximum of two pages; the camera-ready version can be extended up to 4 pages. Detailed submission instructions can be found at the Workshop’s website: http://SLM.tttc-events.org. All submissions will be evaluated for selection with respect to their suitability for the workshop, originality, technical soundness, and presented results. Selected submissions can be accepted for a regular or short presentation at the Workshop.

The workshop will make available to all participants an Electronic Workshop Digest, which includes all material that authors are willing to provide: abstract, paper, poster, etc.

Submission deadline: September 16, 2021

Notification of acceptance: September 30, 2021

Camera-ready material: October 8, 2021

Yervant Zorian – General Chair

Synopsys

700 East Middlefield Road

Mountain View, CA 94043-4033, USA

Tel.: +1 (650) 584-7120

E-mail: zorian@synopsys.com

Mehdi Tahoori – Program Chair

Karlsruhe Institute of Technology

Haid-und-Neu-Str 7

76131 Karlsruhe, Germany

Tel.: +49 (721) 608 47778

E-mail: mehdi.tahoori@kit.edu

General Chair: Y. Zorian – Synopsys (US)

General Vice-Chair: K. Chakrabarty – Duke U (US)

Program Chair: M. Tahoori – KIT (DE)

Program Vice-Chair: M. Tehranipoor – UF (US)

Panel Chair: R. Jin – NXP (US)

Publicity Chair: F. Su – Intel (US)

Finance Chair: C-H. Chiang – Intel (US)

Virtualization Chair: S. Di Carlo – Polito (IT)

Web Chair: M. Traiola– École Lyon (FR)

SLMW 2021 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).