Standards – IEEE TTTC https://www.ieee-tttc.org Test Technology Technical Council Mon, 26 Nov 2018 11:53:20 +0000 en-US hourly 1 IEEE 1149.1 https://www.ieee-tttc.org/ieee-1149-1/ Tue, 21 Oct 2014 17:14:56 +0000 http://sauron.polito.it/tttc/v2/?p=6574 Test Access Port and Boundary-Scan
Christopher J. CLARK, Cclark@intellitech.com

]]> IEEE 1149.4 https://www.ieee-tttc.org/ieee-1149-4/ Tue, 21 Oct 2014 17:12:09 +0000 http://sauron.polito.it/tttc/v2/?p=6572 Mixed Signal Test Bus
Bambang SUPARJO, bambang_suparjo@mentor.com

]]> IEEE 1149.6 https://www.ieee-tttc.org/ieee-1149-6/ Tue, 21 Oct 2014 17:11:06 +0000 http://sauron.polito.it/tttc/v2/?p=6570 Boundary Scan Testing of Advanced Digital Networks
Bill EKLOW, beklow@cisco.com

]]> IEEE P1149.7 https://www.ieee-tttc.org/ieee-p1149-7/ Tue, 21 Oct 2014 17:10:17 +0000 http://sauron.polito.it/tttc/v2/?p=6568 Standard for Reduced-pin and Enhanced-functionality Test Access Port and Boundary Scan Architecture
Robert OSHANA, robert.oshana@freescale.com

]]> IEEE 1450-1999 https://www.ieee-tttc.org/ieee-1450-1999/ Tue, 21 Oct 2014 17:09:46 +0000 http://sauron.polito.it/tttc/v2/?p=6566 Standard Tester Interface Language (STIL)
Gregory MASTON, gmaston@synopsys.com

]]> IEEE 1450.1 https://www.ieee-tttc.org/ieee-1450-1/ Tue, 21 Oct 2014 17:08:53 +0000 http://sauron.polito.it/tttc/v2/?p=6564 Extensions to STIL for Semiconductor Design Environment
Tony TAYLOR, t.taylor@ieee.org

]]> IEEE 1450.2-2002 https://www.ieee-tttc.org/ieee-1450-2-2002/ Tue, 21 Oct 2014 17:08:00 +0000 http://sauron.polito.it/tttc/v2/?p=6562 Extensions to STIL for DC Level Specification
Gregg WILDER, gwilder@ti.com

]]> IEEE P1450.3 https://www.ieee-tttc.org/ieee-p1450-3/ Tue, 21 Oct 2014 17:05:27 +0000 http://sauron.polito.it/tttc/v2/?p=6560 Extensions to STIL for Tester Target Specification
Tony TAYLOR, t.taylor@ieee.org

]]> IEEE P1450.4 https://www.ieee-tttc.org/ieee-p1450-4/ Tue, 21 Oct 2014 17:04:44 +0000 http://sauron.polito.it/tttc/v2/?p=6558 Extensions to STIL for Test Flow Specification
Doug SPRAGUE, dsprauge@us.ibm.com
Jim O’REILLY, jim_oreilly@ieee.org

]]> IEEE P1450.6-1 https://www.ieee-tttc.org/ieee-p1450-6-1/ Tue, 21 Oct 2014 17:03:57 +0000 http://sauron.polito.it/tttc/v2/?p=6556 Standard for Describing On-Chip Scan Compression
Bruce CORY, bcory@nvidia.com

]]>