TTTC's Electronic Broadcasting Service
36th IEEE VLSI Test
CALL FOR PAPERS
The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in testing, debug and repair of microelectronic circuits and systems. Major topics include, but are not limited to:
The VTS Program Committee invites original, unpublished Paper Submissions for VTS 2018. Paper submissions should be complete manuscripts, up to six pages (inclusive of figures, tables, and bibliography) in a standard IEEE two-column format; papers exceeding the page limit will be returned without review. Authors should clearly explain the significance of the work, highlight novel features, and describe its current status. On the title page, please include: author name(s) and affiliation(s), and the mailing address, phone number, and e-mail address of the contact author. A 50-word abstract and five keywords identifying the topic area are also required.
Proposals for the Innovative Practices and Special Sessions tracks are also invited. The innovative practices track highlights cutting-edge challenges faced by test practitioners, and innovative solutions employed to address them. Special sessions can include invited presentations on hot topics, panels, embedded tutorials. Innovative practices and special session track proposals should include a title, name and contact information of the session organizer(s), a 150-to-200 word abstract, and a list of prospective participants.
All submissions are to be made electronically through the VTS website. The deadline for all submissions is October 13, 2017. Detailed instructions for submissions will be found at the symposium website http://www.tttc-vts.org. Authors will be notified of the disposition of their papers by December 19, 2017. A submission will be considered as evidence that, upon acceptance, the author(s) will submit a final camera-ready version of the paper by February 09, 2018. Registration of at least one author by the camera-ready deadline and presentation of the paper at the symposium are also required for inclusion of the paper in the published proceedings. In the case of innovative practices and special sessions, the organizers commit to submitting a session title, abstract and list of participants for inclusion in the symposium proceedings.
VTS 2018 will present a Best Paper Award, a Best Special Session Award, and a Best Innovative Practices Session Award based on the evaluations of reviewers, attendees, and an invited panel of judges. We also plan to organize various Student Activities including the TTTC Best Doctoral Thesis Contest and PhD Poster Forum, details for which will be made available through the VTS website. The Best Paper of VTS 2018 and the Best Innovative Practices presentation will be invited to resubmit to the IEEE Design & Test of Computers where they will undergo a regular, but expedited, review process.
TTTC Test Technology Educational Program (TTEP) tutorials on emerging test technology topics will be offered in conjunction with VTS 2018. Tutorial proposals should be submitted according to TTEP 2018 submission guidelines, which will be posted on http://computer.org/tab/tttc/teg/ttep.
Submission deadline: October 13th, 2017
Notification of acceptance: December 19th, 2017
Camera ready deadline: February 09th, 2018
For submission-related information:
Karlsruhe Inst. of Tech.
Innovative Practices Track Co-Chairs
Special Sessions Co-Chairs
New Initiatives Co-Chairs
New Topics Co-Chairs
Corporate Support Co-Chairs
Asian Initiative Chair
Student Activities Chair
Local Arrangements Chair
For more information, visit us on the web at: http://www.tttc-vts.org
VTS 2018 is sponsored by the Test Technology Technical Council (TTTC) of the IEEE Computer Society and the IEEE Philadelphia Section.
IEEE Computer Society-Test Technology Technical Council
TTTC 1ST VICE
MIDDLE EAST &
TTTC 2ND VICE
This message contains public information only. You are invited to copy and distribute it further.
To remove or modify your contact information, or to register new users, please click here and follow the on-line instructions.