Technical Activity Committee on Test Compression
| TAC Chair: | Rohit KAPUR, rkapur@synopsys.com |
- Membership
- People
- Activities
- Board Test
- Defect Tolerance
- Economics of Test
- Embedded Core Test
- FPGA Test
- Freeware Libraries
- IEEE 1149.1 Access
- Hardware Security and Trust
- High Level D&T
- IDDQ Testing
- Infrastructure IP
- MCM Testing
- Memory Test
- MEMS Testing
- Mixed Signal Test
- Nanometer Testing
- Nano-based Devices
- Network-On-Chip Test
- On-line Test
- Power-Aware Testing
- RF Test
- Silicon Debug and Diagnosis
- Students Activities
- System Test
- 3D chips and SiP Testing
- Test Compression
- Test Education
- Test Resource Partitioning
- Test Synthesis
- Thermal Test
- Verification and Test
- Meetings
- Standards
- Worldwide
- Awards
- TTTC Lifetime Contribution Medal
- TTTC Service Awards
- ITC/TTTC GERALD W. GORDON AWARD FOR STUDENT VOLUNTEER SERVICES
- TTTC NAVEENA NAGI AWARD
- THE TTTC JAMES BEAUSANG STUDENT AWARD FOR DFT
- TTTC Jan Hlavicka Memorial Award
- TTTC’s E. J. McCluskey Doctoral Thesis Award
- TTTC Bob Madge Innovation Award
- TTTC JETTA Best Paper Award
- EBS
