Nano-based Devices

Technical Activity Committee on Testing of Nano-based Devices and Systems

TAC Chair: Fabrizio Lombardi, lombardi@ece.neu.edu

As device geometry shrinks in the nano meter range, new technologies have been proposed for the next generation of electronic systems. These innovations depart substantially from current practice because they rely on physical-based phenomena which become relevant at significantly different (atomistic and/or molecular) implementation levels.

These technologies go well beyond the reduction in device geometry to encompass new computational paradigms. Example of these devices are:

  • quantum dots,
  • carbon nanotubes,
  • silicon nanowires,
  • resonant tunneling diodes.

In the computational arena, quantum computing (inclusive of cellular automata), organic switches and tunnel logic arrays have been proposed as Nanofabric. For the foreseen future there is little doubt that these technologies will eventually have an impact on the electronic industry; in the near future their interface with CMOS will also be an important feature to be considered while integrating these technologies into commercial designs.

This TAC will be responsible for promoting different activities such as encouraging the submission, dissemination and review of technical manuscripts in this topic area within TTTC sponsored meetings as well as Special Sessions, Tutorials and Workshops to foster awareness of these issues within the technical testing community.

We envisage an active partecipation in both premier meetings of TTTC (i.e. VTS and ITC) and collaborate with other TACs on relevant workshops which drawn on an interdisciplinary coverage.

A further goal of the TAC is to collaborate with the newly formed NanoTechnology Council of the IEEE to ensure that testing is appropriately included in planned activities.

Upcoming conferences and symposia

IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS) 2024

Submission of title, abstract, and author list: 23 February, 2024
Final Paper Submission: 29 February, 2024
Author Notification: 09 April, 2024
Conference Dates: July 3 – 5, 2024

IEEE European Test Symposium (ETS) 2024
Paper registration: December 8, 2023
Paper PDF upload: December 16, 2023
Notification: February 16, 2024
Conference: May 20-24, 2024

IEEE VLSI Test Symposium (VTS) 2024
Paper registration: October 9, 2023
Paper PDF upload: October 15, 2023
Questions to authors: December 9, 2023
Submission of rebuttal: December 14, 2023
Notification: December 23, 2023
Camera-ready upload: February 03, 2024
Conference: April 22-24, 2024